DIN EN IEC 61189-3-302:2025-11
Test methods for electrical materials, printed board and other interconnection structures and assemblies - Part 3-302: Detection of plating defects in unpopulated circuit boards by computed tomography (CT) (IEC 91/1973/CDV:2024); German and English version prEN IEC 61189-3-302:2024 / Note: Date of issue 2025-10-31
| Fecha edición: |
2025-11-01
En Vigor
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| Idiomas disponibles: | Alemán, Inglés |
| Resumen: | This document specifies Computed tomography(CT) method for copper plating voids in metallized holes of PCB. This standard is applicable to metallized holes of PCB. Dieses Dokument spezifiziert das Computertomographie(CT)-Verfahren für verkupferte Hohlräume in metallisierten Löchern von Leiterplatten. Diese Norm ist anwendbar auf metallisierte Löcher in Leiterplatten. |
| Keywords: | Coatings|Components|Computed tomography|Computers|Connections|Defects|Definitions|Detection|Electrical|Electrical engineering|Electrical testing|Electronic engineering|Electronic equipment and components|Holes|Interconnection|Interconnection structures|Materials|Materials testing|Metallized|Non-destructive testing|Printed circuits|Printed-circuit boards|Testing|Tomography |
| ICS: | 31.180 - Tarjetas y circuitos impresos |
| CTN: |










